Title: HW/SW co-design of scalar multiplication based on the affine coordinates system

Authors: Mohamed Issad

Addresses: Department of System and Multimedia Architecture, Center for Development of Advanced Technologies, Cité 20 Août 1956 BP17, Baba Hassen, Alger, Algerie

Abstract: Scalar multiplication (SM) is the kernel computation in modern public key cryptography (PKC) based on elliptic curves. This paper presents the implementation of the SM using affine coordinates system, over a prime field Fp. The target design is a system-on-chip, based on Hardware/Software Zynq platform. In SM algorithm, the coordinates computations of points require basic arithmetic operations in Fp. Among these operations, modular inversion (MI) and modular multiplication (MM) are complex, because they require the computation of the division. In order to enhance the trade-off: execution time, occupied area, flexibility and configurability, we propose an embedded system where the MI and the MM are implemented around the Zynq processing system (PS), as accelerator cores. The control of the SM algorithm, the modular addition and subtraction are performed in PS. The implementation results show that the execution times of 256-bit and 521-bit SM computations are 28 ms and 151.4 ms, respectively.

Keywords: elliptic curve cryptography; scalar multiplication; modular arithmetic; FPGA; field programmable gate array; Zynq.

DOI: 10.1504/IJHPSA.2024.145712

International Journal of High Performance Systems Architecture, 2024 Vol.12 No.1, pp.1 - 15

Received: 28 Apr 2024
Accepted: 15 Oct 2024

Published online: 16 Apr 2025 *

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