Title: Efficient hardware implementation of SIMECK lightweight block cipher

Authors: Shweta Kumari; Zeesha Mishra; Bibhudendra Acharya

Addresses: Department of Electronics and Communication Engineering, National Institute of Technology Raipur, CG, 492010, India ' Department of Microelectronics and VLSI, CSVTU Bhilai, Durg, 491107, India ' Department of Electronics and Communication Engineering, National Institute of Technology Raipur, CG, 492010, India

Abstract: The internet of things (IoT) has recently expanded, resulting in a new world of smart gadgets with substantial security consequences. For their vital security role, lightweight block ciphers have gained a significant amount of development in low resource devices (LRDs). SIMECK is a new lightweight block cipher family that incorporates the finest aspect of both SIMON and SPECK. SIMECK is a more efficient block cipher than SIMON and SPECK cipher. These lightweight ciphers are especially referred to as an alternative to the AES for RCD. In this study, area optimised architecture is implemented for SIMECK lightweight block cipher with sizes: 64/128. For implementation on different platforms such as Sparton-6, Sparton-3, Virtex-7, Virtex-6, Virtex-5 and Virtex-4 FPGA are used to examine several properties such as block size, key scheduling, and throughput, among others. The proposed area optimised architecture have attained a maximum operating frequency of 496.429 MHz with 61 slices and a high throughput of 706.032 Mbps on the Virtex-7 platform.

Keywords: lightweight cryptography; resource constrained devices; IoT; internet of things; low resource devices; FРGА; field programmable gate array; advanced encryption standard.

DOI: 10.1504/IJHPSA.2023.130224

International Journal of High Performance Systems Architecture, 2023 Vol.11 No.3, pp.129 - 136

Received: 11 Jul 2022
Accepted: 05 Sep 2022
Published online: 06 Apr 2023 *

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