Article: FPGA implementations of Fruit-v2, Fruit-80, and Grain-128AEAD stream ciphers Journal: International Journal of High Performance Systems Architecture (IJHPSA) 2022 Vol.11 No.2 pp.59 - 72 Abstract: The use of devices with limited resources, such as wireless sensor network (WSN), radio-frequency identification (RFID), industrial Internet of Things (IIoT), has increased. Xilinx field-programmable gate array (FPGA) solutions provide real-time processing and flexibility. For all these, the main challenging problem is confidentially with limited resources. The eSTREAM portfolio was started to discover efficient lightweight stream ciphers. Later on, various stream ciphers have been proposed depending upon the requirement of applications. The minimum area, higher frequency, and higher throughput-area ratio are the main requirements. This can be achieved by implementing ciphers in three ways: the basic version, the serial version, and the parallel version. Using the basic version, one can achieve a higher operating frequency. The lesser area can be accomplished in the serial version. In the parallel version, the maximum throughput-area ratio is obtained. This paper discusses the design and implementation of the basic version, serial version, and parallel version of Fruit-v2, Fruit-80, and Grain-128AEAD. The main objective is to achieve the requirement based on the application. Inderscience Publishers - linking academia, business and industry through research

Title: FPGA implementations of Fruit-v2, Fruit-80, and Grain-128AEAD stream ciphers

Authors: Guntapudi Vamsi Krishna; Dheeraj Kumar Sharma

Addresses: Department of Electronics and Communication Engineering, National Institute of Technology Kurkshetra, Kurukshetra, Haryana, 136119, India ' Department of Electronics and Communication Engineering, National Institute of Technology Kurkshetra, Kurukshetra, Haryana, 136119, India

Abstract: The use of devices with limited resources, such as wireless sensor network (WSN), radio-frequency identification (RFID), industrial Internet of Things (IIoT), has increased. Xilinx field-programmable gate array (FPGA) solutions provide real-time processing and flexibility. For all these, the main challenging problem is confidentially with limited resources. The eSTREAM portfolio was started to discover efficient lightweight stream ciphers. Later on, various stream ciphers have been proposed depending upon the requirement of applications. The minimum area, higher frequency, and higher throughput-area ratio are the main requirements. This can be achieved by implementing ciphers in three ways: the basic version, the serial version, and the parallel version. Using the basic version, one can achieve a higher operating frequency. The lesser area can be accomplished in the serial version. In the parallel version, the maximum throughput-area ratio is obtained. This paper discusses the design and implementation of the basic version, serial version, and parallel version of Fruit-v2, Fruit-80, and Grain-128AEAD. The main objective is to achieve the requirement based on the application.

Keywords: FPGA; stream cipher; ultra-lightweight; LFSR; linear feedback shift register; NLFSR; non-linear feedback shift register; basic version; serial version; parallel version.

DOI: 10.1504/IJHPSA.2022.127768

International Journal of High Performance Systems Architecture, 2022 Vol.11 No.2, pp.59 - 72

Received: 13 Jun 2021
Accepted: 30 Mar 2022
Published online: 16 Dec 2022 *

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Title: FPGA implementations of Fruit-v2, Fruit-80, and Grain-128AEAD stream ciphers

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