Title: A drain-current model for DG PMOSFETs with fabricated 35 nm device comparison

Authors: Todd G. Mckenzie, Yiming Li

Addresses: SOI Device Modeling and Simulation Department IBM Microelectronics, Essex Junction, VT, USA. ' Department of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan

Abstract: This work presents a continuous, analytic drain-current model for symmetric DG PMOSFETs. The model is derived from the closed form solution of Poisson|s equation and current continuity equation without the charge sheet approximation. The model is extended to include the mobility degradation effect. In addition, a fast solver is presented which determines drain current to within a user-defined accuracy. The new model is fit to hardware, and I–V curves comparing the analytic model to experimental data are shown.

Keywords: DG PMOSFETs; MOSFETs; analytical modelling; drain current models; simulation; calibration; nanoscale technology; nanotechnology; mobility degradation.

DOI: 10.1504/IJCSE.2006.012766

International Journal of Computational Science and Engineering, 2006 Vol.2 No.3/4, pp.144 - 147

Available online: 14 Mar 2007 *

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