Title: An automated fault-tolerant route discovery with congestion control using TFRF model for 3D network-on-chips

Authors: Sapna Tyagi; Amit Agarwal; Vinay Avasthi; Piyush Maheshwari

Addresses: Computer Science/IT Department, UP Technical University, Uttar Pradesh, India ' Department of Virtualization, University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India ' University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India ' Indian Institute of Technology, Roorkee, Uttarakhand- 247667, India; Institute of Electrical and Electronics Engineers and Computer Society, Washington, DC, USA

Abstract: As one of the principle patterns of communication technology for 3D-integrated circuit (ICs), the 3D-networks-on-chips (3D-NoCs) have lot of attention from scientific research community. 3D-NoCs has been provided as a propitious solution merging the high parallelism of network-on-chip (NoCs) interconnect paradigm with the high-performance and lower interconnect-power of three-dimensional integration circuits. For the permanent link faults, the fault-tolerant routing scheme has been regarded as an effective mechanism to ensure the performance of the 2D NoCs. In this paper, we propose a triggered fault-free route forwarding model called TFRF for 3D mesh NoCs without requiring any virtual channels (VCs).TFRF is a deadlock-free scheme by adopting a logic-based routing named TFRF guided by a turn activating rule model. The experimental results show that TFRF possesses better performance, improved reliability and lower overhead compared with the state-of-the-art reliable routing schemes.

Keywords: 3D-networks-on-chips; 3D-NoCs; triggered fault-free route forwarding model; virtual channels; VCs; deadlock; turn activating rules.

DOI: 10.1504/IJCNDS.2020.103865

International Journal of Communication Networks and Distributed Systems, 2020 Vol.24 No.1, pp.83 - 105

Received: 19 Jul 2017
Accepted: 14 Mar 2018

Published online: 02 Dec 2019 *

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