Title: High-level optimised systems design using hardware-software partitioning
Authors: Lilia Kechiche; Lamjed Touil; Bouraoui Ouni
Addresses: Laboratory of Electronics and Micro-electronics, National Engineering School of Monastir, 5000, Monastir, Tunisia ' Laboratory of Electronics and Micro-electronics, Higher Institute of Technological Studies Sousse, 4023 Riadh, Sousse, Tunisia ' Networked Objects Control and Communications Systems Lab, National Engineering School of Sousse, 4054, Sousse, Tunisia
Abstract: Embedded systems have a wide range as they have become essential parts of modern life. A typical embedded system consists of application-specific hardware and programmable software. Hardware-software (HW/SW) partitioning problem defines which tasks should be mapped to software and hardware. It allows the proposition of an optimised system with predefined constraints. In this paper, a heuristic algorithm, the hybrid-bee-colony-optimisation for multiple-choice HW/SW partitioning is proposed. The proposed algorithm aims to minimise power consumption and execution time, while meeting area constraint. This heuristic algorithm is developed to generate an approximate solution in acceptable delay. The Virtex 5 is chosen as a target platform. Simulation results are compared with existing works and they show rapidity with the generation of an optimal solution near to the exact one.
Keywords: hardware-software partitioning; heuristic algorithm; bee-colony optimisation; system on a programmable chip; SOPC.
International Journal of Advanced Intelligence Paradigms, 2019 Vol.13 No.3/4, pp.346 - 367
Received: 08 Dec 2016
Accepted: 02 Mar 2017
Published online: 03 Sep 2019 *