Title: Dynamically configurable security for SRAM FPGA bitstreams

Authors: Lilian Bossuet, Guy Gogniat, Wayne Burleson

Addresses: LESTER Laboratory of Universite de Bretagne Sud, 56321 Lorient, France. ' LESTER Laboratory of Universite de Bretagne Sud, 56321 Lorient, France. ' Electrical and Computer Engineering Department, University of Massachusetts, Amherst, MA 01003, USA

Abstract: FPGAs are becoming increasingly attractive – thanks to the improvement of their capacities and their performances. Today, FPGAs represent an efficient design solution for numerous systems. Moreover, since FPGAs are important for the electronics industry, it becomes necessary to improve their security, particularly for SRAM FPGAs, since they are more vulnerable than other FPGA technologies. This paper proposes a solution to improve the security of SRAM FPGAs through flexible bitstream encryption. This proposition is distinct from other works because it uses the latest capabilities of SRAM FPGAs like partial dynamic reconfiguration and self-reconfiguration. It does not need an external battery to store the secret key. It opens a new way of application partitioning oriented by the security policy.

Keywords: field programmable gate arrays; FPGA; SRAM; security design; bitstream encryption; partial reconfiguration; self-reconfiguration; reconfigurable architectures.

DOI: 10.1504/IJES.2006.010166

International Journal of Embedded Systems, 2006 Vol.2 No.1/2, pp.73 - 85

Published online: 05 Jul 2006 *

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