Title: Tuning adaptive microarchitectures

Authors: Ashutosh S. Dhodapkar, James E. Smith

Addresses: Department of Electrical and Computer Engineering, University of Wisconsin – Madison, 1415, Engineering Drive, Madison, WI 53711, USA. ' Department of Electrical and Computer Engineering, University of Wisconsin – Madison, 1415, Engineering Drive, Madison, WI 53711, USA

Abstract: Microprocessors are designed with a fixed set of microarchitectural resources. However, resource requirements vary across programs and within a program as it passes through different phases of execution. This mismatch between the microarchitecture and program requirements leads to sub-optimal power/performance. We present an adaptive microarchitecture that dynamically adapts to changing program requirements in order to achieve power efficiency with minimal performance loss. The microarchitecture employs four multi-configuration units which are controlled by a phase-based tuning algorithm. We show, via simulation, that the best performing tuning algorithm achieves significant reduction in leakage power with performance loss of ~1%.

Keywords: adaptive microarchitectures; reconfigurable hardware; virtual machines; hardware-software co-design; low-power; program phase detection; tuning algorithms; working set signatures; reconfigurable architectures; microprocessors.

DOI: 10.1504/IJES.2006.010163

International Journal of Embedded Systems, 2006 Vol.2 No.1/2, pp.39 - 50

Published online: 05 Jul 2006 *

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