Open Access Article

Title: Routability prediction for FPGA integrated circuits using deep learning

Authors: Yuzhang Liu

Addresses: Shenzhen Polytechnic University, Shenzhen, 518055, China

Abstract: To address the issues of high computational cost in the routing simulation of the field-programmable gate array physical design process and the neglect of the global topological structure of the circuit, a method for predicting the routability of integrated circuits based on deep learning is proposed. Circuits are abstracted into complex networks, from which topological features are extracted. These are fused with traditional circuit features and mapped onto heatmaps, achieving unified representation of geometric and topological information. Subsequently, the routing simulation task is transformed into an image generation problem. By introducing an efficient channel attention mechanism within a conditional generative adversarial network framework, the method highlights crucial feature channels to enhance generated image quality. Experimental results demonstrate that the proposed approach achieves 98.26% structural similarity and a peak signal-to-noise ratio of 41.75 dB, both significantly outperforming existing methods. This method provides a new paradigm for rapid assessment of routability prediction during the layout stage.

Keywords: field-programmable gate array; FPGA; routing process simulation; attention mechanism; complex network; generative adversarial network; GAN.

DOI: 10.1504/IJICT.2026.155477

International Journal of Information and Communication Technology, 2026 Vol.27 No.84, pp.102 - 131

Received: 31 Mar 2026
Accepted: 26 Apr 2026

Published online: 03 Aug 2026 *