Title: Hybrid triangulation Humboldt Squid topology aggregation optimisation algorithm-based CMOS 45 nm inverter design with SSC for high-speed 4 flash analogue-to-digital converter

Authors: G.B. Christina; S. Venkatesan; B. Nancharaiah

Addresses: Department of Electronics and Communication Engineering, GIET University, Gunupur, Odisha, India ' Department of Electronics and Communication Engineering, GIET University, Gunupur, Odisha, India ' Department of Electronics and Communication Engineering, Usha Rama College of Engineering and Technology, Telaprolu-521109, Andhra Pradesh, India

Abstract: Analogue-to-digital converters (ADCs), particularly flash ADCs, are vital in high-speed digital systems and rely heavily on CMOS inverters for performance. This paper presents a new design strategy for a 45 nm CMOS inverter optimised for high-speed 4-bit flash ADCs using the hybrid triangulation Humboldt Squid topology aggregation optimisation algorithm (Hyb-TriHum-STAOA). The design focuses on achieving balanced switching profiles to minimise delays and improve speed and accuracy. Key parameters such as threshold voltage, channel length, and width are fine-tuned for optimal power consumption, speed, and noise margins. The choice of 45 nm technology ensures scalability and efficiency for high-frequency applications. Simulation results demonstrate significant improvements, with a propagation delay of 1.07 μs and power consumption of 6 mW, highlighting the design's effectiveness and potential to enhance high-speed digital systems.

Keywords: flash ADCs; CMOS inverter; hybrid triangulation Humboldt Squid topology aggregation optimisation algorithm; threshold voltage optimisation; symmetrical switching.

DOI: 10.1504/IJPELEC.2026.152435

International Journal of Power Electronics, 2026 Vol.22 No.2, pp.141 - 168

Received: 28 Aug 2024
Accepted: 26 Apr 2025
Published online: 19 Mar 2026 *

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