Title: Design and evaluation of seven-level switched-capacitor boost multilevel inverter with nine switches and the triple voltage gain

Authors: Rajiv Ranjan Sinha; Rajib Kumar Mandal

Addresses: Department of Electrical Engineering, NIT Patna, Bihar, India ' Department of Electrical Engineering, NIT Patna, Bihar, India

Abstract: A novel switched capacitor multilevel inverter (SCMLI) is introduced in the presented paper. There are several issues with the existing multilevel inverter (MLI) like its complicated structure, complex switching control, difficulty in generating the gate pulse, numerous components, along with the stress of high voltage on the semiconductor switches. There is a noticeable rise in the quantity of semiconductor devices for generating a greater number of levels. In planned topology a seven-level voltage outcome is created by utilising nine-switches, one-diode and two-capacitors. The reduced switch count, reduced amount of voltage stress, low cost factor, lower total harmonic distortion, and built-in fault tolerance capability of the planned 7L-SC-BMLI are the main features of the planned topology. Finally, the functioning and capability of the planned inverter in order to boost the input by a factor of three are validated using MATLAB/Simulink and experimental data on a laboratory prototype.

Keywords: boosting factor; switched capacitor multilevel inverter; SCMLI; capacitor charging; H-bridge; switch pulse width modulation; SPWM.

DOI: 10.1504/IJPELEC.2025.148282

International Journal of Power Electronics, 2025 Vol.21 No.5, pp.497 - 519

Received: 02 Jan 2025
Accepted: 12 Mar 2025
Published online: 01 Sep 2025 *

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