An enhanced architecture for pattern matching in FPGA for intrusion detection in wireless sensor networks Online publication date: Sat, 25-Oct-2014
by A. Babu Karuppiah; S. Rajaram
International Journal of Mobile Network Design and Innovation (IJMNDI), Vol. 4, No. 3, 2012
Abstract: Due to increasing number of network worms and virus, network users are vulnerable to malicious attacks. A network intrusion detection system (NIDS) provides an effective security solution. It monitors network traffic for suspicious data patterns, and informs system administrators to take proper actions. Implementing NIDS in WSNs have unique constraints as compared to traditional networks making the implementation of existing security measures impracticable due to limitation in data memory, code space and energy to power the sensor. In this paper, a novel FPGA-based signature match co-processor structural design is proposed. The computational complexity of our proposed bitmap encoder based NIDS is compared with ROM based NIDS. Experimental results show that the proposed architecture due to the reduction in the hardware leads to an efficient reduction in the size of the sensor nodes, increases the speed of the network and decreases the power consumption of the WSN.
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