Title: Treatments for reliability improvement in thick oxides diffusion and gate replacement I/O transistors

Authors: Romain Ritzenthaler; Moonju Cho; Tom Schram; Alessio Spessot; Eddy Simoen; Barry J. O'Sullivan; Eugenio Dentoni Litta; Naoto Horiguchi

Addresses: imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium ' imec, Kapeldreef 75, 3001 Leuven, Belgium

Abstract: In this work, the negative bias temperature instability (NBTI) performance for HKMG and diffusion and gate replacement (D&GR) input/output (I/O) devices is investigated. Even though NBTI performances of D&GR transistors are aligned with conventional HKMG (high-k/metal gate) integration with thin oxide devices, it is not the case for thick oxide I/O devices. In particular, it is shown that strong lifetime degradation is observed as soon as high-k layers are deposited on top of the thick interfacial layer. The NBTI degradation is correlated to a diffusion of Ti/Hf (potentially Al) elements from the HKMG gate stack down to the interfacial layer. Directions for reliability improvement treatments are then defined. It is shown that decoupled plasma nitridation (DPN) and fluorine implant could greatly improve NBTI performance, through an improvement of interface and bulk (inside SiO2 interfacial layer) defect density. Device trade-offs are also investigated for the DPN treatments and fluorine implants cases.

Keywords: Al2O3 capping layers; CMOS process integration; diffusion and gate replacement; D&GR; DRAM periphery transistors; high-k metal gate; I/O devices; Mg capping layers; MOSFET fabrication.

DOI: 10.1504/IJMATEI.2017.10006775

International Journal of Materials Engineering Innovation, 2017 Vol.8 No.1, pp.53 - 70

Received: 28 May 2016
Accepted: 09 Jan 2017

Published online: 14 Aug 2017 *

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