Title: RF authenticated protection scheme for SRAM-based FPGA IP cores

Authors: Sridhar Laavanya; V. Lakshmi Prabha

Addresses: Pyramid Design Private Limited, 25 (Old no. 33) K.S. Ramaswamy Street, K.K. Pudur, Coimbatore 641038, Tamil Nadu, India ' Government College of Engineering, Rettiyaarpatti, Tirunelveli 627007, Tamil Nadu, India

Abstract: Field programmable gate arrays (FPGAs) have become increasingly popular due to their rapid development times and low costs. Many FPGA-based systems utilise third-party intellectual property (IP) in their development. With their increased use, the need to protect the IP against unauthorised use has become important. In this paper, we have proposed a novel wireless intellectual property protection (IPP) technique that overcomes the secure secret decryption key storage problem associated with traditional encryption-based IPP techniques that are widely used for IPP of static random access memory-based FPGA IP cores. The proposed scheme also provides an extra authentication protection for IP cores to make it more security efficient. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging.

Keywords: SRAM; static random access memory; FPGAs; field programmable gate arrays; IPP; intellectual property protection; bitstream encryption; RFID; radio frequency identification; authentication protection; decryption key transmission; electronic security.

DOI: 10.1504/IJESDF.2012.045392

International Journal of Electronic Security and Digital Forensics, 2012 Vol.4 No.1, pp.82 - 100

Received: 17 Sep 2011
Accepted: 18 Nov 2011
Published online: 19 Nov 2014 *

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