Title: Hardware implementation of invisible image watermarking algorithm using secured binary image authentication technique

Authors: P. Karthigaikumar, K. Baskaran

Addresses: Department of Electronics and Communication Engineering, Karunya University, Coimbatore 641 114, Tamil Nadu, India. ' Department of Computer Science and Engineering, Government College of Technology, Coimbatore 641013, Tamil Nadu, India

Abstract: In information security, the authentication and detection of tampering and forgery are of primary concern. Data hiding or watermarking for binary images authentication is a promising approach to alleviate these concerns. Even the use of a secret static key is not secured due to various attacks. To mitigate the damage of secret key exposure, key updating signature schemes can be used. Key updating is done using a one-way function. The one-way function used in this paper is the message-digest 5 (MD5) hash function. MD5 provide a unique relationship between the input and the output hash value. An additional string of data is appended with this hash value to represent the time elapsed and hence makes the key 140-bit long, which will vary dynamically. The objective is to develop real time, reliable and secure watermarking systems, which can be achieved through hardware implementations. In this paper, we present a hardware implementation of an invisible spatial domain image watermarking algorithm with dynamic key updating for binary image. The proposed architectures were modelled, simulated and synthesised in Xilinx ISE.

Keywords: invisible images; image watermarking; FPGA; field programmable gate arrays; dynamic key updating; image authentication; information security; electronic security; data hiding; binary images; simulation; modelling.

DOI: 10.1504/IJESDF.2010.038615

International Journal of Electronic Security and Digital Forensics, 2010 Vol.3 No.4, pp.333 - 354

Received: 19 Dec 2009
Accepted: 13 Aug 2010
Published online: 14 Feb 2011 *

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