Article: PULP-Lite: a more light-weighted multi-core framework for IoT applications Journal: International Journal of Sensor Networks (IJSNET) 2025 Vol.49 No.3 pp.135 - 147 Abstract: The increasing volume of data generated by real-time applications and sensors places significant performance demands on processors. Single-core processors are constrained by the inherent limitations of their architecture in terms of parallel processing capability, making it challenging to handle real-time applications. To address this, we propose parallel ultra low power lite (PULP-Lite), a tightly coupled multi-core on-chip system to efficiently handle near-sensor data analysis in the Internet of Things endpoint devices. PULP-Lite uses low-latency interconnections and an innovative address-mapping mechanism to connect central processing units (CPU), ensuring high-performance processing while maintaining flexibility with a lightweight multi-core programming. We evaluate a field-programmable gate array (FPGA) implementation of PULP-Lite with 8 cores, showing a speedup of 6×-7.8× over a single core for various machine learning algorithms. Compared to Greenwaves' AI Processor (GAP8), PULP-Lite achieves up to 21.7% higher performance over different interconnection topologies, scheduling methods, and stack organisations. Inderscience Publishers - linking academia, business and industry through research

Title: PULP-Lite: a more light-weighted multi-core framework for IoT applications

Authors: Yong Yang; Yuyu Lian; Yanxiang Zhu; Shun Li; Wenhua Gu; Ming Ling

Addresses: School of Microelectronics, Nanjing University of Science and Technology, Nanjing, China ' School of Integrated Circuits, Southeast University, Nanjing, China ' Verimake Innovation Lab, Nanjing Renmian Integrated Circuits Co., Ltd., Nanjing, China ' School of Integrated Circuits, Southeast University, Nanjing, China ' School of Microelectronics, Nanjing University of Science and Technology, Nanjing, China ' School of Integrated Circuits, Southeast University, Nanjing, China

Abstract: The increasing volume of data generated by real-time applications and sensors places significant performance demands on processors. Single-core processors are constrained by the inherent limitations of their architecture in terms of parallel processing capability, making it challenging to handle real-time applications. To address this, we propose parallel ultra low power lite (PULP-Lite), a tightly coupled multi-core on-chip system to efficiently handle near-sensor data analysis in the Internet of Things endpoint devices. PULP-Lite uses low-latency interconnections and an innovative address-mapping mechanism to connect central processing units (CPU), ensuring high-performance processing while maintaining flexibility with a lightweight multi-core programming. We evaluate a field-programmable gate array (FPGA) implementation of PULP-Lite with 8 cores, showing a speedup of 6×-7.8× over a single core for various machine learning algorithms. Compared to Greenwaves' AI Processor (GAP8), PULP-Lite achieves up to 21.7% higher performance over different interconnection topologies, scheduling methods, and stack organisations.

Keywords: multi-core optimisation; parallel processing; computer systems organisation.

DOI: 10.1504/IJSNET.2025.149889

International Journal of Sensor Networks, 2025 Vol.49 No.3, pp.135 - 147

Received: 05 Mar 2025
Accepted: 11 Mar 2025
Published online: 17 Nov 2025 *

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Title: PULP-Lite: a more light-weighted multi-core framework for IoT applications

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