A description style for automatic hardware synthesis
by Zainalabedin Navabi, John Spillane
International Journal of Computer Applications in Technology (IJCAT), Vol. 5, No. 1, 1992

Abstract: A behavioural synthesis subset of VHDL is introduced here. This description style does not imply a fixed architecture, is technology independent, is synthesisable, and it is at a level of abstraction which is convenient for the hardware designers. The description style is presented in the form of a template, and for the allowable constructs of this template corresponding hardware structures are defined.

Online publication date: Tue, 10-Jun-2014

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