Title: Design of half sample delay recursive digital integrators using trapezoidal integration rule

Authors: Madhu Jain; Maneesha Gupta; N.K. Jain

Addresses: Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, A-10, Sector 62, Noida 201307, Uttar Pradesh, India ' Advanced Electronics Lab, Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, Sector 3, Dwarka, New Delhi 110075, India ' Instrument Design and Development Centre, Indian Institute of Technology, Hauz Khas, New Delhi 110016, India

Abstract: This paper describes the design of half sample delay recursive digital integrators. For this, a half sample delay is applied on trapezoidal integration rule, then a modified FIR fractional delay filter is used to design recursive digital integrators. The modified FIR fractional delay filter is less complex and more efficient than original one. In this way lower order recursive digital integrators have been designed and compared with existing half sample delay and conventional recursive digital integrators. The results show the effectiveness of the proposed integrators with low percentage absolute magnitude relative error (PARE) and linear phase response over almost 0% to 80% of the entire Nyquist frequency range.

Keywords: digital integrator design; trapezoidal integrators; fractional delay filter; linear phase integrators; half sample delay; recursive digital integrators; finite impulse response; FIR filter.

DOI: 10.1504/IJSISE.2016.075006

International Journal of Signal and Imaging Systems Engineering, 2016 Vol.9 No.2, pp.126 - 134

Received: 16 Mar 2013
Accepted: 07 Apr 2014
Published online: 29 Feb 2016 *

Full-text access for editors Full-text access for subscribers Purchase this article Comment on this article