Title: Multi-core system performance prediction and analysis at the ESL

Authors: Jen-Chieh Yeh; Chi-Hung Lin; Chun-Nan Liu

Addresses: Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), 195 Chung Hsing Rd., Sec. 4, Chu Tung, Hsin Chu, 310, Taiwan ' Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), 195 Chung Hsing Rd., Sec. 4, Chu Tung, Hsin Chu, 310, Taiwan ' Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), 195 Chung Hsing Rd., Sec. 4, Chu Tung, Hsin Chu, 310, Taiwan

Abstract: Multi-core system and the associated software parallelisation techniques have become one of the major trends of SoC design. For higher system performance and lower power consumption, this paper reveals a system performance prediction and analysis method for multi-core system by adopting electronic system-level (ESL) design methodology. With the high simulation speed and approximate time characteristic, the ESL virtual platform can be done at early design stage before implementation on the real chip. Based on the scalable multi-core virtual platform, we can perform one to eight-core system performance trend prediction as well as multi-core system performance analysis. The software parallelisation experiments are conducted for observing the performance improvement and further discussed about hardware-software co-design and the hardware cost reduction benefited from increasing software parallelism.

Keywords: electronic system level; ESL design; multi-core systems; performance evaluation; virtual platforms; software parallelisation; system on chip; SoC design; hardware-software co-design.

DOI: 10.1504/IJCSE.2014.058700

International Journal of Computational Science and Engineering, 2014 Vol.9 No.1/2, pp.86 - 94

Available online: 16 Jan 2014 *

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