Generating verifiable LOTOS specifications from UML models: a graph transformation-based approach Online publication date: Mon, 22-Oct-2018
by Salim Djaaboub; Elhillali Kerkouche; Allaoua Chaoui
International Journal of Embedded Systems (IJES), Vol. 10, No. 6, 2018
Abstract: The increasing complexity and widespread use of complex and critical systems require advanced techniques and tools to address their specification, verification and validation. The goal of this paper is to integrate two standard languages (UML and LOTOS) for the specification, verification and validation of dynamic behaviours of critical systems. The main purpose of this integration is to take benefits of the ease-of-use of the graphical notation of UML in system modelling and the formal notation of LOTOS in system verification. In this paper, we propose a graph transformation-based approach to generate automatically LOTOS specifications from UML dynamic models. This approach enables developers, in one hand to model the behaviours of systems using graphical UML statechart and communication diagrams, and in the other hand to generate automatically verifiable LOTOS specifications. The proposed approach is automated using AToM3 tool, and it is illustrated through the modelling and verification of two embedded systems.
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