Design and comparison of 0.18-µm CMOS power amplifiers for ultra-wide-band applications
by Vishakha P. Bhale; Upena D. Dalal; Rajendra M. Patrikar
International Journal of Wireless and Mobile Computing (IJWMC), Vol. 9, No. 4, 2015

Abstract: With the help of standard power amplifier design steps, four class AB power amplifier topologies are designed and compared using 0.18-μm CMOS process for 3-5-GHz ultra-wide-band applications. The proposed four topologies are: basic common source topology, cascode topology, cascoded current reused topology, and the two-stage power amplifier topology. Comparison of the four designs has been made to the parameters such as power gain, input and output matching, reverse isolation, power-added efficiency, stability, and linearity and noise figure. By comparison, it is found that the two-stage design with cascoded current reused topology as first stage and common source topology as second stage achieves the best performance among the four designs.

Online publication date: Sun, 03-Jan-2016

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