Measurement of the local residual stress between fine metallic bumps in 3D flip chip structures
by Kota Nakahira; Hironori Tago; Takuya Sasaki; Ken Suzuki; Hideo Miura
International Journal of Materials and Structural Integrity (IJMSI), Vol. 8, No. 1/2/3, 2014

Abstract: The local thermal deformation of the chips mounted by area-arrayed fine bumps has increased drastically because of the decrease of the flexural rigidity of the thinned chips. In this paper, the dominant structural factors of the local residual stress in a silicon chip are investigated quantitatively based on the measurement of the local residual stress in a chip using stress sensor chips. The piezoresistive strain gauges were embedded in the sensor chips. The length of each gauge was 2 µm and a unit cell consisted of four gauges with different crystallographic directions. This alignment of strain gauges enables to measure the tensor component of three-dimensional stress fields separately. Test flip chip substrates were made by silicon chip on which the area-arrayed tin/copper bumps were electroplated. The width of a bump was fixed at 200 µm and the bump pitch was varied from 400 µm to 1,000 µm. The measured amplitude of the residual stress increased from about 30 MPa to 250 MPa. It was confirmed that both the material constant of underfill and the alignment structure of fine bumps are the dominant factors of the local deformation and stress of a silicon chip mounted on area-arrayed metallic bumps.

Online publication date: Tue, 21-Oct-2014

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