Characteristics of gate-all-around polycrystalline silicon channel SONOS flash memory
by Joo Yun Seo; Sang-Ho Lee; Se Hwan Park; Wandong Kim; Do-Bin Kim; Byung-Gook Park
International Journal of Nanotechnology (IJNT), Vol. 11, No. 1/2/3/4, 2014

Abstract: In this study, the gate-all-around (GAA) poly-Si channel flash memories with a nitride charge trap layer (Si₃N₄) have been successfully fabricated. Electrical characteristics of fabricated devices including the threshold voltage shift with program/erase operation have been investigated. Gate structures were formed differently according to each defined channel width. Results show that devices with the gate-all-around structure have superior program efficiency. To investigate the effect of gate structure on the program efficiency, TCAD simulation was carried out. Another issue of the fabricated devices is poor erase operation due to the quality of the blocking oxide. This issue has been studied through the capacitor composed of the same stack structure, and the way to improve the erase operation has been proposed.

Online publication date: Sat, 15-Nov-2014

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