Design of a novel error correction coding with crosstalk avoidance for reliable on-chip interconnection link Online publication date: Fri, 11-Jul-2014
by M. Maheswari; G. Seetharaman
International Journal of Computer Applications in Technology (IJCAT), Vol. 49, No. 1, 2014
Abstract: With the shrinking geometry, interconnection wires in network-on-chip (NoC) will be exposed to different noise sources such as crosstalk coupling and supply voltage fluctuation that cause random and burst errors. These errors affect the reliability of NoC. Hence error control codes are incorporated to make the NoC robust against errors. In this paper, we propose a novel low complex error control code to correct random and burst errors and simultaneously avoid crosstalk. The proposed error control code uses a novel triplicate add parity (TAP) scheme to avoid crosstalk in the interconnection links. The proposed error control code can detect burst errors of three and correct random or burst errors up to two. Hybrid automatic repeat request (HARQ) system is employed when burst errors of three occurs. The proposed error control code outperforms the existing error control code in terms of residual flit error rate and energy consumption.
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.Complimentary Subscribers, Editors or Members of the Editorial Board of the International Journal of Computer Applications in Technology (IJCAT):
Login with your Inderscience username and password:
Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.
If you still need assistance, please email subs@inderscience.com