Implementation of correlation power analysis attack on an FPGA DES design
by Jun Yang; Weiwei Shan; Junyin Liu; Huafang Sun
International Journal of Information and Communication Technology (IJICT), Vol. 5, No. 3/4, 2013

Abstract: Differential power analysis (DPA) has become a great threat to cryptographic chips as an important side channel attack. But it is still not easy to put attacks on encryption algorithm with FPGA implementation. In this paper, a data encryption standard (DES) algorithm is implemented on a FPGA. Then an experimental platform of DPA for FPGA implementation is built with verified feasibility. Experimental results for correlation-based DPA attack on the DES hardware implementation show that our DPA experimental platform is effective in realising the DPA attack on hardware implementation of cryptographic algorithms.

Online publication date: Thu, 19-Dec-2013

The full text of this article is only available to individual subscribers or to users at subscribing institutions.

 
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.

Pay per view:
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.

Complimentary Subscribers, Editors or Members of the Editorial Board of the International Journal of Information and Communication Technology (IJICT):
Login with your Inderscience username and password:

Username:        Password:          Forgotten your password?

Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.

If you still need assistance, please email subs@inderscience.com