Modified VLSI implementation of DA-DWT for image compression
by M. Nagabushanam; P. Cyril Prasanna Raj; S. Ramachandran
International Journal of Signal and Imaging Systems Engineering (IJSISE), Vol. 5, No. 3, 2012

Abstract: The wavelet transformation is a widely used technique for image processing application. Hence compared to traditional transforms such as the Fast Fourier Transform (FFT) and Discrete Cosine Transform (DCT), wavelet transform holds both time and frequency information, based on a multi-resolution analysis framework. There is a growing need to embed it into a real system. Field Programmable Gate Array (FPGA) implementation of Discrete Wavelet Transform (DWT) results in higher processing speed and lower costs when compared to other implementation methods. In this work a modified DA which performs low-pass and high-pass filtering improves the computational speed of DWT. A 9/7 filter is designed using modified DA architecture to perform low-pass and high-pass filtering. By using optimised DA architecture the LUT size is reduced from 29 to 24 locations in 9th order filter and 27 to 24 in 7th order filter. The design is verified in a Verilog HDL simulator and implemented on XILINX Virtex5 FPGA board.

Online publication date: Wed, 31-Dec-2014

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