Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS)
by Gaurav Singh, Sandeep K. Shukla
International Journal of Embedded Systems (IJES), Vol. 3, No. 1/2, 2007

Abstract: Behavioural synthesis has received considerable attention recently and new action-oriented hardware specification formalisms have been proposed. We call such formalisms Concurrent Action Oriented Specifications (CAOS). CAOS models have low granularity concurrent atomic action descriptions with a semantics similar to Dijkstra's guarded command language. Such models have been shown to generate efficient hardware designs, and the importance of making such CAOS-based synthesis process power-aware cannot be undervalued. In this paper, we formulate the problems of power-optimal synthesis for CAOS, discuss several heuristics and show some numerical examples illustrating the use of such heuristics during CAOS-based synthesis.

Online publication date: Sun, 02-Dec-2007

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