Dynamically reconfigurable neuron architecture for the implementation of self-organising learning array
by Janusz A. Starzyk, Yongtao Guo, Zhineng Zhu
International Journal of Embedded Systems (IJES), Vol. 2, No. 1/2, 2006

Abstract: In this paper, we describe a new dynamically reconfigurable neuron hardware architecture based on the modified Xilinx Picoblaze microcontroller and self-organising learning array (SOLAR) algorithm reported earlier. This architecture is aiming at using hundreds of traditional reconfigurable field programmable gate arrays (FPGAs) to build the SOLAR learning machine. SOLAR has many advantages over the traditional neural network hardware implementation. Neurons are optimised for area and speed, and the whole system is dynamically self-reconfigurable during the runtime. The system architecture is expandable to a large multiple-chip system.

Online publication date: Wed, 05-Jul-2006

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