System-level parallelism and concurrency maximisation in reconfigurable computing applications
by Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek El-Ghazawi, David Caliga,Nikitas Alexandridis
International Journal of Embedded Systems (IJES), Vol. 2, No. 1/2, 2006

Abstract: Reconfigurable computers can leverage the synergism between conventional processors and FPGAs to provide both hardware functionalities and general-purpose computers flexibility. In a large class of applications on these platforms, the data-transfer overheads can be comparable or even greater than the useful computations which can degrade the overall performance. In this paper, we perform a theoretical and experimental study of this specific limitation. The mathematical formulation of the problem has been experimentally verified on the state-of-the-art reconfigurable platform, SRC-6E. We demonstrate and quantify the possible solution to this problem that exploits the system-level parallelism within reconfigurable machines.

Online publication date: Wed, 05-Jul-2006

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