Protecting micro-grids by a SVM-based pattern recognised islanding detection approach and optimal placement of PID-FC controller using hybrid ABC-APSO algorithm
by Gundala Srinivasa Rao; Gattu Keseva Rao
International Journal of Power Electronics (IJPELEC), Vol. 9, No. 4, 2018

Abstract: The penetration of distributed generations (DG) ensures the increase of demand for consistent, reasonable and spotless electricity facing with some design and operational challenges such as islanding and fault current. Several active and passive methods have been suggested in the past to detect islanding with the placement of fault current limiter (FCL) to reduce fault current. As they suffer from the large non-detection zone (NDZ) and a high cost due to the impedance of FCL. To overcome such issues we propose a novel proportional-integral-derivative fault current controller (PID-FCC) which is placed optimally by using a hybrid artificial bee colony with accelerated particle swarm optimisation algorithm (ABC-APSO) to limit the fault current and a support vector machine (SVM)-based pattern recognising approach for islanding detection in micro-grids. The PID selects the optimal size of the FCC by means of its tuned parameters. The experimental results show that our proposed method optimally places the PID-FCC with reduced size and detects islanding with high accuracy.

Online publication date: Mon, 01-Oct-2018

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