Wafer-scale fabrication and modification of silicon nano-pillar arrays for nanoelectronics, nanofluidics and beyond Online publication date:: Fri, 20-Nov-2020
by Dirk Jonker; Lucas Kooijman; Yasser Pordeli; Bernhard Van Der Wel; Erwin Berenschot; Bjorn Borgelink; Hai Le-The; Meint De Boer; Jan Eijkel; Ray Hueting; Roald Tiggelaar; Arie Van Houselt; Han Gardeniers; Niels Tas
International Journal of Nanotechnology (IJNT), Vol. 17, No. 7/8/9/10, 2020
Abstract: We report on the fabrication and modification of a top-down nanofabrication platform for enormous parallel silicon nanowire-based devices. We explain the nanowire formation in detail, using an additive hybrid lithography step, optimising a reactive ion etching recipe for obtaining smooth and vertical nanowires under a hybrid mask, and embedding the nanowire in a dielectric membrane. The nanowires are used as a sacrificial template, removal of the nanowires forms arrays of well-defined nano-pores with a high surface density. This platform is expected to find applications in many different physical domains, including nanofluidics, (3D) nanoelectronics, as well as nanophotonics. We demonstrate the employment of the platform as field emitter arrays, as well as a state-of-the-art electro-osmotic pump.
Online publication date:: Fri, 20-Nov-2020
If you still need assistance, please email email@example.com