- Array processors
- Multiprocessor systems
- RISC architectures
- Data flow systems
- VLSI architectures, systems and applications
- Performance evaluation and new trends
- Multimedia systems and applications
- Circuits and systems for data communications
- Systems on a chip
- Network on a chip
- Analog circuit design
- Modelling and simulation
- CAD tools and design methodologies
- Test and validation
- Pipelined architectures
- Vectorisation methods
- Vector processing
- Dynamic pipelines
- Pipeline chaining
- Array Processors
- Interconnections network topologies, such as systolic, mesh, cube, etc.
- Parallel algorithms for array processors
- Associative array processors
- Masking and routing mechanisms
- Multiprocessor Systems
- Multiprocessor architectures
- Tightly and loosely-coupled multiprocessors
- Interconnection networks
- Parallel memory organisation and multi-cache
- Multiprocessing control
- RISC Architectures
- Instruction set
- Pipelined RISC architectures
- Data Flow Systems
- Data-driven computing
- Data flow architectures
- VLSI Architectures
- VLSI computing structures
- Dedicated VLSI architectures
- Performance evaluation and new trends
More on this journal...
IJHPSA provides a lively forum for the communications of original research. It acts as a scientific and professional journal to timely disseminate original research work on advanced systems architecture, which is at the heart of high-performance and cost-effective systems.
The audience for IJHPSA consists of researchers, academics, graduate students, professionals and system engineers working and interested in high-performance systems and their underlying advanced architectures.Contents
IJHPSA publishes original peer-reviewed papers, which include research papers, review papers, case studies, book reviews. Special Issues devoted to important topics on advanced systems architecture will occasionally be published.
IJHPSA is indexed in:
IJHPSA is listed in:
Editor in Chief
- Nedjah, Nadia, State University of Rio de Janeiro, Brazil
Editorial Board Members
- Bagherzadeh, Nader, University of California, Irvine, USA
- Bhujade, Moreshwar R, Indian Institute of Technology, India
- França, Felipe M. G., Universidade Federal do Rio de Janeiro, Brazil
- Gagliardi, Fabrizio, Microsoft Corporation, Switzerland
- Šilc, Jurij, Jožef Stefan Institute, Slovenia
- Jozwiak, Lech, Eindhoven University of Technology, Netherlands
- Kelly, Paul H. J., Imperial College London, UK
- Mesquita, Antonio C., Universidade Federal do Rio de Janeiro, Brazil
- Mourelle, Luiza de Macedo, State University of Rio de Janeiro, Brazil
- Navaux, Philippe O. A., Federal University of Rio Grande do Sul (UFRGS), Brazil
- Prieto, Alberto, Universidad de Granada, Spain
- Sedukhin, Stanislav G., The University of Aizu, Japan
- Tisserand, Arnaud, IRISA-ENSSAT, France
- Trancoso, Pedro, University of Cyprus, Cyprus
- Valero, Mateo, Universidad Politecnica de Catalunya, Spain
- Wang, Chao, University of Science and Technology of China, China
- Xu, Cheng-Zhong, Wayne State University, USA
- Yang, Mei, University of Nevada, Las Vegas, USA
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