Title: Fast indexing for blocked array layouts to reduce cache misses

Authors: Evangelia Athanasaki, Nectarios Koziris

Addresses: Computing Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, Greece. ' Computing Systems Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, Greece

Abstract: Several studies have been conducted on blocked data layouts, in conjunction with loop tiling to improve locality of references. In this paper, we further reduce cache misses, restructuring the memory layout of multi-dimensional arrays, so that array elements are stored in a blocked way, exactly as they are swept by the tiled instruction stream. A straightforward way is presented to easily translate multi-dimensional indexing of arrays into their blocked memory layout using quick and simple binary-mask operations. Actual experimental results and simulations illustrate that performance is greatly improved because of the considerable reduction of cache misses.

Keywords: cache locality; loop tiling; blocked array layouts; fast indexing; code optimisation; reference locality; cache misses; memory layout; multi-dimensional arrays; simulation; data locality.

DOI: 10.1504/IJHPCN.2005.009429

International Journal of High Performance Computing and Networking, 2005 Vol.3 No.5/6, pp.417 - 433

Published online: 31 Mar 2006 *

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