Title: A parallel middleware framework for vehicular network applications

Authors: Jianchun Jiang; Kailong Wang; Yanmei Jing

Addresses: Chongqing Automotive Electronics and Embedded System Research Center, College of Automation, Chongqing University of Posts and Telecommunications, No. 2, Chongwen Road, Nan’an District, Chongqing, China ' Chongqing Automotive Electronics and Embedded System Research Center, College of Automation, Chongqing University of Posts and Telecommunications, No. 2, Chongwen Road, Nan’an District, Chongqing, China ' Chongqing Automotive Electronics and Embedded System Research Center, College of Automation, Chongqing University of Posts and Telecommunications, No. 2, Chongwen Road, Nan’an District, Chongqing, China

Abstract: More and more multicore processors are applied to vehicle information terminal (VIT). It has made a great challenge to vehicular network application (VNA) development that all VNA software must be adapted to the hardware features. We propose a parallel middleware framework for VNAs in this article. Our targets aim at resolving the requirements of VNAs for real-time performance, extensibility, reusable structure and parallelisation access, and the adaptability for heterogeneous network. We discuss and present a middleware framework with multi-layer architecture, which consist of static and active modules, to be responsible for data process and message transmission respectively. Finally, we develop the middleware prototypes to verify the feasibility of our middleware framework in Linux and Android systems, and the experimental results are presented to show the value and potential of the proposed method.

Keywords: parallel middleware; vehicular networks; heterogeneous networks; vehicle information terminals; multicore processors; performance; extensibility; reusability; data processing; message transmission; Linux systems; Android systems; vehicle information systems; vehicle communications.

DOI: 10.1504/IJHPSA.2016.078802

International Journal of High Performance Systems Architecture, 2016 Vol.6 No.2, pp.82 - 97

Received: 15 Sep 2015
Accepted: 30 Mar 2016
Published online: 02 Sep 2016 *

Full-text access for editors Full-text access for subscribers Purchase this article Comment on this article