Title: RF authenticated reconfiguration-based access control protection scheme for SRAM-based FPGA IP cores

Authors: Laavanya Sridhar; V. Lakshmi Prabha

Addresses: Pyramid Design Private Limited, 25 (old no 33) K.S. Ramaswamy Street, K.K. Pudur, Coimbatore, Tamil Nadu, India ' Government College of Technology, Coimbatore-641013, Tamil Nadu, India

Abstract: The constantly growing demand for ready to use design components, also known as intellectual property (IP) cores, has created a very lucrative and flourishing market which is very likely to continue its current path not only into the near future. With increase in use of field programmable gate arrays (FPGAs) in production designs, and with growth of system on FPGA (SOF) applications, the security of FPGA IP cores cannot be taken for granted anymore. In this paper, we have proposed a novel wireless-based IP core infringement preventive approach for intellectual property protection (IPP) of static random access memory (SRAM)-based FPGA IP cores. The proposed scheme exploits reconfiguration aspect of SRAM-based FPGA and incorporates special tag bypass features for increase suitability of proposed scheme as an IPP technique for reconfigurable IP cores. A hardware prototype is developed for evaluation of proposed scheme and the testing results are quite encouraging.

Keywords: static random access memory; SRAM; field programmable gate arrays; FPGAs; intellectual property protection; IPP; reconfiguration; access control; tag bypass feature; bitstream encryption; radio frequency identification; RFID; decryption key transmission; cryptography.

DOI: 10.1504/IJESDF.2013.054404

International Journal of Electronic Security and Digital Forensics, 2013 Vol.5 No.1, pp.45 - 66

Received: 31 Mar 2012
Accepted: 09 Oct 2012
Published online: 26 Jul 2014 *

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