Title: A hardware-in-the-loop simulation environment for real-time systems development and architecture evaluation

Authors: Vasily V. Balashov, Anatoly G. Bakhmurov, Maxim V. Chistolinov, Ruslan L. Smeliansky, Dmitry Y. Volkanov, Nikita V. Youshchenko

Addresses: Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia. ' Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia. ' Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia. ' Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia. ' Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia. ' Department of Computational Mathematics and Cybernetics, Moscow State University, Leninskie Gory, MSU, 1, Bldg. 52, Room 764, Moscow, 119991, Russian Federation, Russia

Abstract: In this paper, we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the-loop simulation. The environment to support this technology is described. This environment also enables simulation-based development of RTES software and evaluation of RTES architecture on early stages of RTES development.

Keywords: real-time embedded systems; critical computer systems; hardware-in-the-loop simulation; simulation-based development; simulation-based architecture evaluation; distributed systems.

DOI: 10.1504/IJCCBS.2010.031706

International Journal of Critical Computer-Based Systems, 2010 Vol.1 No.1/2/3, pp.5 - 23

Published online: 21 Feb 2010 *

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