Title: Efficient mapping of an image processing application for a network-on-chip based implementation

Authors: Marcus Vinicius Carvalho Da Silva, Nadia Nedjah, Luiza de Macedo Mourelle

Addresses: Dept. of Electronics Engineering and Telecommunications, State University of Rio de Janeiro, Rua Sao Francisco Xavier, 524, Sala 5145-F, Maracana 20550-900, Rio de Janeiro, Brazil. ' Dept. of Electronics Engineering and Telecommunications, State University of Rio de Janeiro, Rua Sao Francisco Xavier, 524, Sala 5145-F, Maracana 20550-900, Rio de Janeiro, Brazil. ' Dept. of Systems Engineering and Computation, State University of Rio de Janeiro, Rua Sao Francisco Xavier, 524, Sala 5145-F, Maracana 20550-900, Rio de Janeiro, Brazil

Abstract: Network-on-chip (NoC) is considered the next generation of communication infrastructure, which will be omnipresent in different environments. In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. Increasing scale integration increases the number of possible IPs to be addressed on a NoC platform. In this paper, we propose a multi-objective evolutionary-based mapping of an image processing application on a NoC based platform. The IP mapping is driven by the area occupied, execution time and power consumption.

Keywords: network-on-chip; NoC; mapping; digital image processing.

DOI: 10.1504/IJHPSA.2009.030098

International Journal of High Performance Systems Architecture, 2009 Vol.2 No.1, pp.46 - 57

Published online: 10 Dec 2009 *

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