Title: Performance analysis of hard-real-time embedded software

Authors: Tai-Yi Huang, Kuang-Li Huang, Yeh-Ching Chung

Addresses: Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan 300, ROC. ' Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan 300, ROC. ' Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan 300, ROC

Abstract: The execution time of an instruction depends on its adjacent instructions and I/O activities. Our method first iteratively determines the set of all possible execution times of each instruction. We next construct a set of linear constraints on their execution counts. The maximum value of the cost function is an upper bound of the worst-case execution time. We demonstrate the capability of this method on a machine model where a processor has an instruction cache and pipeline, and cycle-stealing DMA I/O is concurrently executing. The experimental results show that our method safely and tightly bounds the worst-case execution time.

Keywords: hard real-time systems; worst-case execution time; WCET; integer linear programming; ILP; embedded software; embedded systems; performance evaluation.

DOI: 10.1504/IJES.2006.014856

International Journal of Embedded Systems, 2006 Vol.2 No.3/4, pp.209 - 221

Published online: 12 Aug 2007 *

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