Title: High-performance hardware operators for polynomial evaluation

Authors: Arnaud Tisserand

Addresses: Laboratory of Computer Science, Robotics and Microelectronics (LIRMM), National Center for Scientific Research (CNRS), University of Montpellier 2, 161 rue Ada, 34392 Montpellier cedex 5, France

Abstract: This paper presents some recent works on hardware evaluation of functions. A method for the automatic generation of high-performance arithmetic operators based on polynomial approximations is described. It deals with the bit-level representation of the polynomial coefficients, the intermediate computations width, the approximation and the rounding errors. The generated operators are small, fast and numerically validated at design time. Some examples have been implemented on Field Programmable Gate Arrays (FPGAs).

Keywords: arithmetic operators; high performance; hardware operators; function approximation; polynomial evaluation; polynomial coefficients; approximation errors; rounding errors; field programmable gate arrays; FPGAs.

DOI: 10.1504/IJHPSA.2007.013288

International Journal of High Performance Systems Architecture, 2007 Vol.1 No.1, pp.14 - 23

Published online: 19 Apr 2007 *

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