Title: Modelling, design and implementation of quadratic buck converter for low power applications

Authors: Ravindranath Tagore Yadlapalli; Anuradha Kotapati

Addresses: Department of Electrical and Electronics Engineering, R.V.R. and J.C. College of Engineering, Chowdavaram, Guntur, 522019, Andhra Pradesh, India ' VNR VJIET, Bachupally, Hyderabad, Andhra Pradesh, 500090, India

Abstract: This paper discusses the modelling, design and implementation of quadratic buck converter (QBC) for low voltage CPU voltage regulator applications. The small-signal modelling of QBC is characterised by state-space averaging technique. The QBC has been applied with average current-mode (ACM) control strategy in order to evaluate steady sate as well as dynamic performance. The hardware development of QBC is exploited using FPGA controller. The PSIM simulation results are validated with the experimental results in terms of line and load regulations. It can be verified from results that the system stability is guaranteed for a wide range of operating conditions.

Keywords: switched-mode power supply; SMPS; right-half-plane zeros; RHPZ; average current-mode; ACM; controller; transient settling time; TST; transient voltage deviation; TVD.

DOI: 10.1504/IJPELEC.2020.106224

International Journal of Power Electronics, 2020 Vol.11 No.3, pp.322 - 338

Received: 25 May 2017
Accepted: 03 Dec 2017
Published online: 02 Apr 2020 *

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