L4eRTL: a robust and secure real-time architecture with L4 microkernel and para-virtualised PSE51 partitions Online publication date: Mon, 20-Nov-2017
by Qingguo Zhou; Rui Zhou; Binbin Yong; Xiaoqiang Wang; Gaofeng Zhang; Hai Jiang; Kuan-Ching Li
International Journal of Embedded Systems (IJES), Vol. 9, No. 6, 2017
Abstract: Different classes of applications exhibit different demands on today's heterogeneous computing systems whose complexity will incur further challenges in ensuring system safety and application security for certain required functionality of these systems. This paper proposes a component-based robust and secure real-time architecture, L4eRTL, which decomposes complex systems into sub-modules and distributes them to POSIX-enabled partitions through para-virtualisation. L4eRTL is designed and implemented based on low-level L4 microkernel and several essential para-virtualised components by IRQ virtualisation, time virtualisation, clock virtualisation, and memory virtualisation. Micro-benchmark programs and sample applications have been conducted to demonstrate the effectiveness of L4eRTL in supporting multiple isolated PSE51 environments for system safety and application security.
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